Image sensor arrays typically comprise a linear array of photosensors which raster scan an image bearing surface or document and convert the microscopic image areas viewed by each photosensor to image signal charges. Following an integration period, the image signal charges are transferred and amplified as an analog video signal to a common output line or bus through successively actuated multiplexing transistors.
For high-performance image sensor arrays, one possible design includes an array of photosensors of a width comparable to the width of a page being scanned, to permit one-to-one imaging generally without the use of reductive optics. In order to provide such a “full-width” array, however, relatively large silicon structures must be used to define the large number of photosensors. One technique to create such a large array is to make the array out of several butted silicon chips. In one design, an array includes 20 silicon chips, butted end-to-end, with each chip having active photosensors spaced at 400 or more photosensors per inch.
Further, in a full-color scanner, as would be used in color copying, there may be provided three or more linear arrays on each chip, each array filtered to receive a single primary color. As described in U.S. Pat. No. 5,519,514, each linear array on a chip may be desired to be independently controllable in some respects, particularly in terms of “integration time.” Integration time is, broadly speaking, the length a particular photosensor is exposed to light from a small area on the original image being scanned, to yield a pixel of data. In the case of a color apparatus, each of three or more primary-color photosensors will view the substantially same small area in the original image, to yield full-color image data. In various situations, the integration times associated with different-color linear arrays on a single chip may be desired to be finely adjusted.
Moreover, due to manufacturing tolerances within the process of creating linear arrays, it has been found that the pixels located at each edge of a respective linear array (edge pixels) and the pixels located between the edge pixels (interior pixels) require different integration times in order to balance the output of each respective pixel within the linear array when all pixels are exposed to uniform illumination. For example, the edge pixels of a linear array may require greater or lesser integration times than the interior pixels in order to output the same response as the entire linear array is exposed to uniform illumination levels.
Gain Non-Uniformity (GNU) is a measure of the response variation (both positive and negative with respect to the average) within an image sensor chip compared to the average response from the entire image sensor chip. Positive Gain Non-Uniformity (PGNU) is a measure of the pixel with the maximum response versus the average response of all pixels, while Minus Gain Non-Uniformity (MGNU) is a measure of the pixel with the minimum response versus the average response of all pixels. It has been theorized that by compensating for the relative edge pixel to interior pixel responses, the overall GNU will be significantly reduced.
The present disclosure addresses a system and chip for adjusting integration times associated with edge and interior pixels within different photosensor sets in different chips which form a larger system.